Binary-coded decimal adder

Binary-coded decimal adder

A binary-coded decimal adder is disclosed. The BCD adder comprises a first binary to abacus (B/A) unit, a second binary to abacus (B/A) unit, a first parallel addition (P/A) unit, a second parallel addition (P/A) unit, a thermometric to binary (T/B) unit and a carry diagnostic unit. The adder transf...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: CHANG, SHI-XUN, LIN, CHIEN-HUNG, YI, SHUUNG
Format: Patent
Sprache:chi ; eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:A binary-coded decimal adder is disclosed. The BCD adder comprises a first binary to abacus (B/A) unit, a second binary to abacus (B/A) unit, a first parallel addition (P/A) unit, a second parallel addition (P/A) unit, a thermometric to binary (T/B) unit and a carry diagnostic unit. The adder transfers the sum of a 4-bit binary addend and a 4-bit binary augend to a binary-coded decimal signal, and then output it.