Semiconductor device having vertical sidewall MOSFET and method for making the same

The present invention relates to a semiconductor device having vertical sidewall MOSFET and method for making the same. The semiconductor device comprises a silicon layer, a first oxide layer, a raised semiconductor element, a gate oxide layer and a gate. By utilizing Silicon on Insulator (SOI) technique to form semiconductor device, the gate can be easily inlaid in sides of the channel region of the semiconductor element to avoid the further overlap between the drain, the source and the gate while Plasma Immersion Ion Implantation proceeding. Thus, the conventional problem of overlap capacitance can be improved since the gate is inlaid in the sides of the channel region of the raised semiconductor element, so that the Miller Effect is therefore overcome.