Method of manufacturing complementary metal oxide semiconductor transistor
A method of manufacturing a CMOS is disclosed. A substrate has a first gate and a second gate. A dielectric layer and a patterned photo-resist layer are formed sequentially on the substrate. After an etching process, the dielectric layer without the photo-resist layer is formed a spacer around the f...
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| Format: | Patent |
| Sprache: | chi ; eng |
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| Zusammenfassung: | A method of manufacturing a CMOS is disclosed. A substrate has a first gate and a second gate. A dielectric layer and a patterned photo-resist layer are formed sequentially on the substrate. After an etching process, the dielectric layer without the photo-resist layer is formed a spacer around the first gate, and the dielectric layer with the photo-resist layer is formed a block layer on the second gate. And the recesses are formed in the substrate of two lateral sides of the first gate. The epitaxial silicon layers are formed in the recesses. |
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