Stacked semiconductor package

A metal pattern 12 for heat dissipation is arranged on the back face of the second semiconductor substrate 5 such that it contacts onto the first semiconductor element 1 assembled on the semiconductor device 3 in proximity of said back face. Vias 14, 15 are formed adjacent to the peripheral place of...

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Bibliographische Detailangaben
1. Verfasser: AKAHOSHI, TOSHITAKA
Format: Patent
Sprache:chi ; eng
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Beschreibung
Zusammenfassung:A metal pattern 12 for heat dissipation is arranged on the back face of the second semiconductor substrate 5 such that it contacts onto the first semiconductor element 1 assembled on the semiconductor device 3 in proximity of said back face. Vias 14, 15 are formed adjacent to the peripheral place of the semiconductor substrates 2,5 and penetrated in the direction of thickness for heat transfer. The via 14 is connected with the metal pattern 12 for heat dissipation on the back face of said semiconductor substrate 5. Solder ball 11 is provided to bridge between the semiconductors 3, 6. Heat transferred to the metal pattern 12 of the semiconductor device 6 is transferred to the via 15 of the semiconductor device 3 in proximity of the back face of the semiconductor device 6, which is provided with said metal pattern 12, by said solder ball 12.