Semiconductor package for preventing chip cracks and fabrication method thereof

A semiconductor package for preventing chip cracks and a fabrication method thereof are provided. An insulating layer and a metallic layer are successively formed on a circuit layer of a substrate, and at least one semiconductor chip is mounted on the metallic layer. Thus, during subsequent wire-bon...

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Bibliographische Detailangaben
Hauptverfasser: TSAI, YUN-LUNG, WANG, CHUNG-PAO, SUNG, CHIENIH, CHEN, HAO-ZENG, KU, YUNGUAN
Format: Patent
Sprache:chi ; eng
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Beschreibung
Zusammenfassung:A semiconductor package for preventing chip cracks and a fabrication method thereof are provided. An insulating layer and a metallic layer are successively formed on a circuit layer of a substrate, and at least one semiconductor chip is mounted on the metallic layer. Thus, during subsequent wire-bonding and/or molding processes, the metallic layer carries and supports the semiconductor chip so as to prevent cracks of the semiconductor chip that is partly subject to stress. Moreover, the metallic layer can effectively transmit heat produced by operation of the semiconductor chip to an external environment, and the metallic layer provides a grounding effect to eliminate interference with signal transmission of the semiconductor chip caused by signals or noise around the semiconductor chip, such that production quality and performances of the semiconductor package are improved.