Maximum or minimum value output circuit

To provide a maximum or minimum output circuit which is a maximum or minimum value detection circuit for selectively outputting a maximum level signal of a plurality of input signals, and can output a maximum or minimum value by a simple constitution without having additive circuits. The maximum or minimum value output circuit for selectively outputting a maximum or minimum level signal of a plurality of input signals V12, V13 comprises: a plurality of input transistors Q11, Q12, to the bases of which different signals are inputted, respectively, and the collecters and the emitters of which are connected in parallel, respectively; current mirror circuits M21, M22 which output currents corresponding to currents flowing through the input transistors Q11, Q12; and an output transistor Q13 from the base of which a signal corresponding to the maximum or minimum level input signal of the input signals V12, V13 inputted to the bases of the input transistors Q11, Q12 is outputted by making a current corresponding to