Integrated circuit with partly silicidated silicon layer

The integrated circuit (1) comprises an electric device (2) such as a resistor which comprises a first silicon layer (120) having a silicidated part (122) and a non-silicidated part (123), and a further electric device (3) such as, e.g. a capacitor, a field effect transistor or a non-volatile memory...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: VAN DER MEER, HENDRIK HUBERTUS, PETERS, WILHELMUS CORNELIS MARIA
Format: Patent
Sprache:chi ; eng
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Beschreibung
Zusammenfassung:The integrated circuit (1) comprises an electric device (2) such as a resistor which comprises a first silicon layer (120) having a silicidated part (122) and a non-silicidated part (123), and a further electric device (3) such as, e.g. a capacitor, a field effect transistor or a non-volatile memory gate stack. The further electric device (3) comprises a dielectric layer (130) having a dielectric layer thickness (D). The non-silicidated part (123) of the electric device (2) is covered by a further dielectric layer (131) having the dielectric layer thickness (D), the silicidated part (122) is not covered by the further dielectric layer (131). Such an integrated circuit (1) may be formed by a method according to invention which involves a reduced number of lithography steps.