Current integrating sense amplifier for memory modules in RFID

A low read current, low power consumption sense amplifier well suited for low frequency RFID systems is disclosed. An MOS transistor receives the read current from a memory cell, typically an EEPROM, and a current mirror is formed by a parallel MOS transistor. The mirror current is integrated on a capacitor after the charge on the capacitor is cleared via a reset pulse. A time period is defined during which the voltage on the capacitor is compared to a second voltage. A comparator, maybe with a Schmitt trigger input, receives the voltage on the capacitor and compares it to a reference voltage. If the voltage on the capacitor reaches or does not the level of the reference voltage within the time period the state of the comparator indicates the contents of the memory cell. A differential circuit arrangement may be formed with a second memory cell always outputting a leakage or very low current and a third memory cell always outputting a high current. An average voltage is generated for the high and the low outp