Memory cell

In the case of the memory cell, in the trench, a layer sequence comprising a first oxide layer (1), a nitride layer (2), and a second oxide layer (3), facing the gate electrode, is present at the lateral trench walls, while the nitride layer (2) is absent in a curved region (4) of the trench bottom....

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Hauptverfasser:	LUDWIG, CHRISTOPH, DEPPE, JOACHIM, KLEINT, CHRISTOPH
Format:	Patent
Sprache:	chi ; eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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creator	LUDWIG, CHRISTOPH DEPPE, JOACHIM KLEINT, CHRISTOPH
description	In the case of the memory cell, in the trench, a layer sequence comprising a first oxide layer (1), a nitride layer (2), and a second oxide layer (3), facing the gate electrode, is present at the lateral trench walls, while the nitride layer (2) is absent in a curved region (4) of the trench bottom. In an alternative configuration, in each case at least one step is formed at the lateral walls of the trench, preferably below the source region or the drain region, respectively.
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subjects	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
title	Memory cell
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