INTEGRATED CIRCUIT ON THE SEMICONDUCTOR SUBSTRATE

The integrated circuit described in this patent has the group of the connecting tabs (314, 316, 326, 328) on the substrate (300) and the group of the delivery pins (5, 6, 7, 8). The first and the second supplying tab (314, 316) are located one by the second and the same is related to the first and t...

Ausführliche Beschreibung

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Bibliographische Detailangaben
1. Verfasser:	SALTERS ROELOF H. W
Format:	Patent
Sprache:	eng ; slo
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY INFORMATION STORAGE PHYSICS SEMICONDUCTOR DEVICES STATIC STORES
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Beschreibung
Zusammenfassung:	The integrated circuit described in this patent has the group of the connecting tabs (314, 316, 326, 328) on the substrate (300) and the group of the delivery pins (5, 6, 7, 8). The first and the second supplying tab (314, 316) are located one by the second and the same is related to the first and to the second supplying pin (6, 7). The first delivery pin (5) and the second delivery pin (8), both of them, are connected to the appropriate first and the second delivery connecting tab via the appropriate conductive connection (330) and the fourth conductive connection (332) The first delivery connecting tab (326) closed to the group of the connecting tabs is lying next to the first supplying connecting tab (314), the second delivery connecting tab (328) is lying next to the second supplying connecting tab (316), the first delivery pin (5) closed to the delivery pins is lying next to the first supplying pin (6), the second delivery pin (8) is lying by the second supplying pin (7), and the first and the second supplying pin (6, 7), both of them, are lying nearest to the axis of symmetry (334) closed to the substrate shape.