INTEGRATED CIRCUIT SYSTEM EMPLOYING STRESS-ENGINEERED LAYERS

INTEGRATED CIRCUIT SYSTEM EMPLOYING STRESS-ENGINEERED LAYERS

INTEGRATED CIRCUIT SYSTEM EMPLOYING STRESS-ENGINEERED LAYERSAn integrated circuit system that includes: providing a substrate including an active device; forming a trench within the substrate adjacent the active device; forming a first layer5 with a first lattice constant within the trench; and form...

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Hauptverfasser: HSIA LIANGOO, LI YISUO, LIU JIN PING, ALEX SEE K.H, ZHOU MEISHENG
Format: Patent
Sprache:eng
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Zusammenfassung:INTEGRATED CIRCUIT SYSTEM EMPLOYING STRESS-ENGINEERED LAYERSAn integrated circuit system that includes: providing a substrate including an active device; forming a trench within the substrate adjacent the active device; forming a first layer5 with a first lattice constant within the trench; and forming a second layer with a second lattice constant over the first layer, the second lattice constant differing from the first lattice constant.Fig. 6