INTEGRATED CIRCUIT SYSTEM EMPLOYING STRESS-ENGINEERED LAYERS

INTEGRATED CIRCUIT SYSTEM EMPLOYING STRESS-ENGINEERED LAYERS

An integrated circuit system that includes: providing a substrate including an active device; forming a trench within the substrate adjacent the active device; forming a first layer with a first lattice constant within the trench; and forming a second layer with a second lattice constant over the fi...

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Bibliographische Detailangaben
Hauptverfasser: CHOO HSIA LIANG, PING LIU JIN, MEISHENG ZHOU, ALEX SEE K.H, YISUO LI
Format: Patent
Sprache:eng
Online-Zugang:Volltext bestellen
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Beschreibung
Zusammenfassung:An integrated circuit system that includes: providing a substrate including an active device; forming a trench within the substrate adjacent the active device; forming a first layer with a first lattice constant within the trench; and forming a second layer with a second lattice constant over the first layer, the second lattice constant differing from the first lattice constant.