Flip chip bonding method for enhancing the performance of connection in flip chip packaging process and layered metal architecture of substrate for stud bump

A flip chip bonding method for enhancing a bonding performance between a chip (11) and a substrate (21) by forming a bump (13) on the chip (11) or the substrate (21), and a layered architecture of the substrate (21) for the same are disclosed. The flip chip bonding method comprises the steps of perf...

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Hauptverfasser:	KIM HYOUNGAN, KOO JA-UK
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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