SE374457

1340306 Semi-conductor devices WESTERN ELECTRIC CO Inc 27 July 1972 [2 Aug 1971] 35131/72 Heading H1K A method of making an IC containing two transistors comprises forming a common collector region on a substrate, forming at a first area a high resistivity base region for one transistor, masking the centre of this high resistivity region, forming around the mask a more heavily doped base contact region and simultaneously forming a base region for the second transistor at a second area of the collector region, and forming emitter regions for the two transistors. The first device is a high-gain high-frequency transistor and the second device is a conventional planar transistor. As shown, Fig. 3, a P type Si substrate 11 is provided with two N+ type subcollector regions 15, 16 and a N type epitaxial layer 18 is deposited to form the collector regions of the transistors. The surface is masked and a high resistivity P- type base region 21 for the high gain transistor is produced by implantation of boron ions followed by redistribution using a boron cap to prevent out diffusion. The centre part of the base region 21 is masked and a window is etched over the subcollector region 16, and impurities are diffused-in to form P+ type base contact region 26 and base region 25. The surface is then remasked and N+ type emitter regions 29, 30 are formed by diffusion. Base contact windows are opened and emitter and base contacts are formed. In the high frequency transistor the active portion of the emitter is restricted by the base contact regions to the small area in contact with the high resistivity base layer 21. In a modification, Fig. 5 (not shown), the active part of the base region of the high resistivity transistor is divided into two stripes by appropriate shaping of the base contact region, and an N+ type collector contact region is formed in the top surface of the layer.