SEMICONDUCTOR POWER DEVICE

FIELD: semiconductor power devices such as power thyristors. ^ SUBSTANCE: proposed semiconductor power device built around n silicon wafer with two main surfaces has p+ emitter layer, n base layer, p base layer, main n+ emitter layer, all arranged from bottom upwards; these layers form, together with anode and cathode electrodes, main thyristor region and peripheral control region; anode electrode, p+ emitter layer, n base layer, and p base layer are common for main thyristor region and peripheral control region. At least main n+ emitter layer has point-contact shunts regularly distributed throughout entire surface area and peripheral shunts separating this layer into sections facing peripheral control region. Main n* emitter layer has point-contact shunts of first type only close to its boundary and remaining part has point-contact shunts of both first and second types and their sectional area is smaller than that of first-type shunts, as viewed from top. Resistance of base p layer section between peripheral control region, cathode electrode, and mentioned sections of main n+ emitter layer is inversely proportional to area of peripheral control region. ^ EFFECT: enhanced stability of critical rate of voltage rise in closed state and on-time irrespective of peripheral control region; enhanced loading capacity of thyristor. ^ 1 cl, 2 dwg