METHOD FOR PRODUCING MIS TRANSISTORS

FIELD: semiconductor engineering; manufacture of metal-insulator- semiconductor transistors and integrated circuits. SUBSTANCE: method includes formation of source and drain regions, and sub-gate insulator on silicon wafer, formation of metal interconnections, estimation of adjustment of threshold v...

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Bibliographische Detailangaben
Hauptverfasser: MASLOVSKIJ V.M, BONDARENKO G.G, BARYSHEV V.G, ULUNTS G.A, ANDREEV V.V, STOLJAROV A.A, TKACHENKO A.L
Format: Patent
Sprache:eng ; rus
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Beschreibung
Zusammenfassung:FIELD: semiconductor engineering; manufacture of metal-insulator- semiconductor transistors and integrated circuits. SUBSTANCE: method includes formation of source and drain regions, and sub-gate insulator on silicon wafer, formation of metal interconnections, estimation of adjustment of threshold voltage DeltaUo and next adjustment of threshold voltage by external action on value of DeltaUo±DeltaU followed by thermal annealing, where signs "+" and "-" for n- and p-channel MIS transistors; DeltaU is change in threshold voltage value during thermal annealing. External action is applied by heavy field-effect tunnel injection of electron charge into sub-gate insulator, electron-charge density being where q is electron charge, C; sigma is electron trap capture section in sub-gate insulator, sq. cm; Us is saturation voltage of MIS transistor threshold voltage varying in the course of injection. EFFECT: facilitated procedure; enhanced precision of threshold voltage adjustment. 2 cl, 2 dwg