PARAPHASAL LOGIC ELEMENT BUILT AROUND MIS TRANSISTORS

FIELD: digital computer engineering; MIS transistors of large-scale integrated circuits for cascade logic device. SUBSTANCE: logic-state RS flip-flop 1 is built around 2AND-NOT gates 2 and 3; in addition, pre-charge transistors 4, 5 are introduced and clock transistor 8 is inserted between common bu...

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Bibliographische Detailangaben
Hauptverfasser: LEMENTUEV V.A, KROTOV V.A
Format: Patent
Sprache:eng
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Zusammenfassung:FIELD: digital computer engineering; MIS transistors of large-scale integrated circuits for cascade logic device. SUBSTANCE: logic-state RS flip-flop 1 is built around 2AND-NOT gates 2 and 3; in addition, pre-charge transistors 4, 5 are introduced and clock transistor 8 is inserted between common bus 15 and point of integration switch-type combination circuits 10, 11 of logic unit 9 whose outputs 16, 17 are connected to respective RS inputs of flip-flop 1. EFFECT: improved speed of response. 2 cl, 3 dwg2