METHOD OF AND SYSTEM FOR EXCITING STRING-TYPE STRAIN GAUGE SENSING ELEMENTS

2. A method and circuit for activating a tensometric string sensor, including: an activating circuit, pulse divider, gate pulse shaping circuit, reference-pulse generator, and reference-pulse counter, characterized in that it includes two generators (4, 8) of activating pulses, EXOR gate (5), zero p...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: GOLONKA EDWARD, NOWAKOWSKI LECH, MUTER MIROSLAW
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:2. A method and circuit for activating a tensometric string sensor, including: an activating circuit, pulse divider, gate pulse shaping circuit, reference-pulse generator, and reference-pulse counter, characterized in that it includes two generators (4, 8) of activating pulses, EXOR gate (5), zero pass detector (7), and D flip-flop (10), whereas the generator input (4) is connected with the metering pulse generator output (3), and the generator output (4) is connected with one input of the EXOR gate (5) and with the input (S) of two flip-flops (12, 15) of the gate signal shaping circuit (11) and with the resetting input (R) of the D flip-flop (10), whereas the input of the second activating-signal generator (8) is connected with the output (Q) of the D flip-flop (10), whereas the output of the second activating-signal generator (8) is connected with the second input of the EXOR gate (5) and with the resetting input (R) of two flip-flops (12, 15) of the gate pulse shaping circuit (11), whereas the EXOR gate output (5) is connected with the resetting input of the pulse counter (9) and of the reference pulse counter (14), and is also connected via the activating circuit (6) with the sensor coil (1) and with the zero pass detector input (7), whereas the zero pass detector output (7) is connected with the pulse divider input (9), whereas the pulse divider output (9) is connected with the input (CP) of the D flip-flop (10) and with inputs of two flip-flops (12, 15) of the gate pulse shaping circuit (11), whereas the output (Q) of the first flip-flop (12) of the gate pulse shaping circuit (11) is connected with the input (D) of the second flip-flop and with one input of the gate (13) of the gate pulse shaping circuit (11), and the second input of the gate (13) is connected with the output (Q) of the second flip-flop (15) of the circuit (11), whereas the gate output (13) of the circuit (11) is connected with the second input of the reference pulse counter (14), whereas the third input of the reference pulse counter (14) is connected with the reference pulse generator output (16), whereas the input (D) of the D flip-flop (10) and the input of the first flip-flop (12) of the gate pulse shaping circuit (11) has HIGH status, whereas the output (S) of the D flip-flop (10) has LOW status.