WIREBOND INTERCONNECT STRUCTURES FOR STACKED DIE PACKAGES

Methods of forming microelectronic package structures/modules, and structures formed thereby, are described. Structures formed herein may include a second die (104, 204) disposed on a first die (102, 202), wherein the second die (104, 204) is within the footprint of the first die (102, 202). A first plurality of interconnect structures (120, 220) disposed on a first surface (107) of the first die (102, 202), and a second plurality of interconnect structures disposed on a first surface (109) of the second die (104, 204). Top surfaces (123) of the first plurality of interconnect structures (102, 202) are coplanar with top surfaces (123) of the plurality of the second interconnect structures (102, 202). At least one of the interconnect structures (102, 202) of the first or the second plurality of interconnect structures (102, 202) comprises a sigmoid shape, A plurality of solder balls (131, 231) are attached to the top surfaces (123) of the first and second plurality of interconnect structures (120, 220), wherein the plurality of solder balls (131, 231) are unevenly spaced. (The most illustrative drawing Figure 1b)