COMPOSITE STACKED INTERCONNECTS FOR HIGH-SPEED APPLICATIONS AND METHODS OF ASSEMBLING SAME

COMPOSITE STACKED INTERCONNECTS FOR HIGH-SPEED APPLICATIONS AND METHODS OF ASSEMBLING SAME

A semiconductor package substrate (110, 210, 310, 410) includes a composite and stacked vertical interconnect on a land side (114, 214, 314, 414) of the substrate (110, 210, 310, 410). The composite and stacked vertical interconnect (120, 220, 320, 420) includes a smaller contact end against the sem...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: CHEAH, Bok Eng, LO, Hungying, OOI, Ping Ping, WONG, Shaw Fong, KONG, Jackson Chung Peng
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRIC ELEMENTS
CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
PRINTED CIRCUITS
SEMICONDUCTOR DEVICES
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Beschreibung
Zusammenfassung:A semiconductor package substrate (110, 210, 310, 410) includes a composite and stacked vertical interconnect on a land side (114, 214, 314, 414) of the substrate (110, 210, 310, 410). The composite and stacked vertical interconnect (120, 220, 320, 420) includes a smaller contact end against the semiconductor package substrate (110, 210, 310, 410), and a larger contact end for board (150, 250, 350, 550) mounting. (The most illustrative drawing is Figure 1A)