INTEGRATED CIRCUIT PACKAGE HAVING PIN UP INTERCONNECT

The present invention relates to an integrated circuit package and manufacturing method thereof, and more particularly to a integrated circuit package having pin up conductive plating to form an interconnect, where an opening on the patterned fifth layer photo-resist material located at bottom portion of the base (101) developed for etching selectively the base (101) to form at least an internal opening and at least a positioning opening, wherein the internal opening corresponds with an inside area of the first patterned conductive layer (103), and the positioning opening corresponds with an outside area of the first patterned conductive layer (103).