PMOS TRANSISTOR CIRCUIT FOR EXHIBITING DIODE CHARACTERISTICS

THERE IS DISCLOSED A CIRCUIT ADAPTED TO EXHIBIT DIODE CHARACTERISTICS. THE CIRCUIT COMPRISES: A DIODE INPUT NODE (120);•A DIODE OUTPUT NODE (130);•A GATE BIAS SUB-CIRCUIT (155) HAVING A GATE BIAS NODE (170), THE GATE BIAS SUB-CIRCUIT (155) ELECTRICALLY CONNECTED TO THE DIODE INPUT NODE (120) AND ADA...

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1. Verfasser: SYAHRIZAL SALLEH
Format: Patent
Sprache:eng
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Zusammenfassung:THERE IS DISCLOSED A CIRCUIT ADAPTED TO EXHIBIT DIODE CHARACTERISTICS. THE CIRCUIT COMPRISES: A DIODE INPUT NODE (120);•A DIODE OUTPUT NODE (130);•A GATE BIAS SUB-CIRCUIT (155) HAVING A GATE BIAS NODE (170), THE GATE BIAS SUB-CIRCUIT (155) ELECTRICALLY CONNECTED TO THE DIODE INPUT NODE (120) AND ADAPTED TO APPLY A GATE BIAS POTENTIAL DERIVED FROM THE INPUT SIGNAL POTENTIAL APPLIED AT THE DIODE INPUT NODE (120) TO THEREBY PROVIDE A GATE BIAS POTENTIAL TO THE GATE BIAS NODE (170); AND A FIRST PMOS TRANSISTOR (140) HAVING A DRAIN TERMINAL (142) A SOURCE TERMINAL (146), A BULK TERMINAL (148) AND A GATE TERMINAL (144), THE DRAIN TERMINAL (142) ELECTRICALLY CONNECTED TO THE DIODE INPUT NODE (120), THE SOURCE (146) AND BULK (148) TERMINALS ELECTRICALLY CONNECTED TO THE DIODE OUTPUT NODE (130) AND THE GATE TERMINAL (144) ELECTRICALLY CONNECTED TO THE GATE BIAS NODE (170). (FIG. 1)