METHODS AND APPARATUS FOR ESTIMATING A POSITION OF A STUCK-AT DEFECT IN A SCAN CHAIN OF A DEVICE UNDER TEST

AS A SCAN PATTERN (1010) IS SHIFTED OUT OF A SCAN CHAIN (1012), THE SCAN PATTERN IS EVALUATED IN REAL-TIME FOR THE EXISTENCE OF A LOGIC CONDITION. A REFERENCE (1016) TO A PORTION OF THE SCAN PATTERN (1010) THAT IS CURRENTLY BEING EVALUATED IS MAINTAINED. UPON IDENTIFYING THE EXISTENCE OF THE LOGIC C...

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Bibliographische Detailangaben
Hauptverfasser: FREDIANI, JOHN, BURLISON, PHIL
Format: Patent
Sprache:eng
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Zusammenfassung:AS A SCAN PATTERN (1010) IS SHIFTED OUT OF A SCAN CHAIN (1012), THE SCAN PATTERN IS EVALUATED IN REAL-TIME FOR THE EXISTENCE OF A LOGIC CONDITION. A REFERENCE (1016) TO A PORTION OF THE SCAN PATTERN (1010) THAT IS CURRENTLY BEING EVALUATED IS MAINTAINED. UPON IDENTIFYING THE EXISTENCE OF THE LOGIC CONDITION WHEN THE REFERENCE HAS A PREDETERMINED RELATIONSHIP TO A STORED VALUE (1018), THE STORED VALUE IS OVERWRITTEN USING THE REFERENCE. THE STORED VALUE IS THEN USED TO ESTIMATE THE POSITION OF A STUCK-AT DEFECT IN THE SCAN CHAIN (1012).