SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

TO SUPPRESS FLOATING SUBSTRATE IN THE THIN SOI MOSFET FORMED ON THE SOI SUBSTRATE(120), THE GATE (ELECTRODE) HAS A TWO-LAYER STRUCTURE AND THE UPPER GATE (500) THEREOF IS IN CONTACT WITH THE SIDES OF THE SOI LAYER (SUBSTRATE).(FIG 2,3)

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Bibliographische Detailangaben
Hauptverfasser: DAI HISAMOTO, YOSHIMI SUDOU
Format: Patent
Sprache:eng
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Zusammenfassung:TO SUPPRESS FLOATING SUBSTRATE IN THE THIN SOI MOSFET FORMED ON THE SOI SUBSTRATE(120), THE GATE (ELECTRODE) HAS A TWO-LAYER STRUCTURE AND THE UPPER GATE (500) THEREOF IS IN CONTACT WITH THE SIDES OF THE SOI LAYER (SUBSTRATE).(FIG 2,3)