ELECTRONIC CIRCUIT INTERCONNECTION SYSTEM USING VIRTUAL MIRROR PACKAGES

A PACKAGE (E.G., A "CHIP CARRIER") (301,401,501-503,601-606) CONTAINING AN INTEGRATED OR OTHER ELECTRONIC CIRCUIT INCLUDES CONNECTION POINTS (E.G.PINS OR SOLDER PADS) (302A-302E.303A-303E,402A-402J,403A-403J) ARRANGED IN A VIRTUAL MIRROR PATTERN.IN THE VIRTUAL MIRROR PATTERN, PAIRS OF ELECTRICALLY INTERCONNECTED CONNECTION POINTS ARE ARRANGED SUCH THAT ONE CONNECTION POINT OF EACH PAIR IS POSITIONED ADJACENT ONE EDGE (301A,401A,401B) OF THE CHIP CARRIER, AND THE CORRESPONDING CONNECTION POINT OF EACH PAIR IS LOCATED ADJACENT ANOTHER EDGE (301B,401C,401D) OF THE CHIP CARRIER.IN THE VIRTUAL MIRROR PATTERN, LINE SEGMENTS DRAWN TO JOIN EACH PAIR OF CONNECTION POINT WILL BE PARALLEL.PREFERABLY, EACH PAIR OF CONNECTION POINTS IS SYMMETRICAL ABOUT AN IMAGINARY AXIS (306,406) THROUGH THE CHIP CARRIER, AND THE CONNECTION POINTS ARE EQUI-SPACED. IN A COMPUTER OR OTHER INFORMATION PROCESSING SYSTEM HAVING A BUS (504,607A,607B) COMPRISED OF A MULTIPLICITY OF PARALLEL CONDUCTORS (304A-304E,404A-404J) ON ONE SURFACE OF A SUBSTRATE (E.G., A PRINTED CIRCUIT BOARD ),SEVERAL VIRTUAL MIRROR PACKAGES CAN BE CONNECTED TO THAT BUS SUCH THAT THE SPACE BETWEEN ADJACENT PACKAGES IS ARBITRARILY SMALL. IN A SIMILAR SYSTEM HAVING A SUBSTANTIALLY IDENTICAL SECOND BUS FORMED ON THE OPPOSING SURFACE OF THE SUBSTRATE DIRECTLY OPPOSITE TEH FIRST BUS, ADDITIONAL VIRTUAL MIRROR PACKAGES CAN BE ATTACHED DIRECTLY OPPOSITE THE VIRTUAL MIRROR PACKAGES ON THE FIRST SURFACE OF THE SUBSTRATE.THE CLOSE PROXIMITY OF THE PACKAGES SIGNIFICANTLY REDUCES THE SIGNAL PROPAGATION DELAY TIME AND PERMITS HIGHER SPEED OPERATION OF THE BUS.FIGURE 3