ELECTRONIC PACKAGE WITH MULTILEVEL CONNECTIONS
A CIRCUITIZED SUBSTRATE FOR USE IN AN ELECTRONIC PACKAGE WHEREIN THE SUBSTRATE (11), E.G., CERAMIC, INCLUDES MORE THAN ONE CONDUCTIVE LAYER (15, 21), E.G., COPPER, THEREON SEPARATED BY A SUITABLE DIELECTRIC MATERIAL (19), E.G., POLYIMIDE. EACH LAYER INCLUDES ITS OWN CONDUCTIVE LOCATION(S) WHICH ARE...
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Format: | Patent |
Sprache: | eng |
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Zusammenfassung: | A CIRCUITIZED SUBSTRATE FOR USE IN AN ELECTRONIC PACKAGE WHEREIN THE SUBSTRATE (11), E.G., CERAMIC, INCLUDES MORE THAN ONE CONDUCTIVE LAYER (15, 21), E.G., COPPER, THEREON SEPARATED BY A SUITABLE DIELECTRIC MATERIAL (19), E.G., POLYIMIDE. EACH LAYER INCLUDES ITS OWN CONDUCTIVE LOCATION(S) WHICH ARE DESIGNED FOR BEING DIRECTLY ELECTRICALLY CONNECTED, E.G., USING SOLDER (31), TO RESPECTIVE CONTACT SITES ON A SEMICONDUCTOR CHIP (17) POSITIONED ON THE SUBSTRATE TO FORM PART OF THE FINAL PACKAGE. A METHOD FOR MAKING SUCH A PACKAGE IS ALSO PROVIDED. SIGNIFICANTLY, THE RESULTING PACKAGE DOES NOT INCLUDE INTERCONNECTIONS BETWEEN THE CONDUCTIVE LAYERS AT THE DESIRED CONTACT LOCATIONS, THESE LOCATIONS, AS MENTIONED, INSTEAD BEING DIRECTLY CONNECTED TO THE CHIP. |
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