METALIZING METHOD OF SEMICONDUCTOR DEVICE

A forming method of metal interconnections is provided to simplify the process using a single interlayer insulator. The method comprises the steps of: depositing a first interlayer insulator(22) and a second insulator(210) for etching stopper on a silicon substrate(23); an anisotropic etching the fi...

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Hauptverfasser: LEE, JUNG-WON, KO, SUK-YUN
Format: Patent
Sprache:eng
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Zusammenfassung:A forming method of metal interconnections is provided to simplify the process using a single interlayer insulator. The method comprises the steps of: depositing a first interlayer insulator(22) and a second insulator(210) for etching stopper on a silicon substrate(23); an anisotropic etching the first and second insulator(22, 210); forming a first contact hole(21A) by selective etching the remained the first insulator(22'); depositing a first metal(24) and forming a first metal wire(24') by etch-back using the remained second insulator(210') as a stopper; sequentially forming a third interlayer insulator(27) and a fourth insulator(211) used stopper on the self-flattened second insulator(210') and first metal wire(24'); an anisotropic etching the third and fourth insulator(27, 211); forming a second contact hole(21B) by selective etching the remained third insulator(27'); and forming a second metal wire(29') by etch-back using the remained fourth insulator(211') as a stopper.