PLANERIZING METHOD OF INTER METAL LAYER FOR SEMICONDUCTOR DEVICE
(A) forming a metal layer for inhibiting it from etching, mediating metal, and a metal mask layer (4) sequentially after the formation of a buried metal (1) on the fixed area of the substrate, (B) spreading a photoresist film and patterning photoresist film (5) on the buried metal, (C) 1st etching t...
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Format: | Patent |
Sprache: | eng ; kor |
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Zusammenfassung: | (A) forming a metal layer for inhibiting it from etching, mediating metal, and a metal mask layer (4) sequentially after the formation of a buried metal (1) on the fixed area of the substrate, (B) spreading a photoresist film and patterning photoresist film (5) on the buried metal, (C) 1st etching the mask layer of mediating metal (4) and mediating metal (3) by using the patterned photoresist film and removing photoresist film, (D) evaporating a photoresist film on the whole surface and forming a micro-pattern on the top of the mediating buried metal (1) and removing exposed metal layer (2) for inhibiting it from etching, (E) forming an insulating layer (7) on the whole area, spreading photoresist film (8) over the insulating layer, and leveling the insulating layer (7), (F) removing the mask layer (4), and (G) evaporating the 2nd metal (9) on the whole surface of resulting material and patterning it for connection with mediating material. |
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