MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE

In wafer processes, after at least one layer which constitutes a structural member of a functional semiconductor element is formed on a semiconductor wafer, an excessive deposition brittle on an edge of the semiconductor wafer is removed by grinding or etching of the wafer edge until the underlying...

Ausführliche Beschreibung

Gespeichert in:

Bibliographische Detailangaben
Hauptverfasser:	IMAOKA, KAZUNORI, FUJISAWA, YOICHI
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS DRESSING OR CONDITIONING OF ABRADING SURFACES ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS GRINDING MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING PERFORMING OPERATIONS POLISHING SEMICONDUCTOR DEVICES TRANSPORTING
Online-Zugang:	Volltext bestellen
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!

Beschreibung
Zusammenfassung:	In wafer processes, after at least one layer which constitutes a structural member of a functional semiconductor element is formed on a semiconductor wafer, an excessive deposition brittle on an edge of the semiconductor wafer is removed by grinding or etching of the wafer edge until the underlying wafer is exposed. The removal of the deposition on the wafer edge reduces dust generation caused from crack and peel-off of the excessive deposition on the wafer edge, even if the wafer edge contacts a jig, etc.. Thus the reduction in dust generation improves production yields of highly integrated semiconductor devices.