CMOS ROM DATA SELECT CIRCUIT

CMOS ROM DATA SELECT CIRCUIT

A data select circuit for selecting a column line in a CMOS ROM and for establishing a connection between a pair of bit lines and corresponding data lines uses a single NMOS pull-down transistor on the column line and a pair of P-channel pass transistors on the bit lines, the pass transistor gates b...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
1. Verfasser: DAVIS, HAROLD L
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRONIC CIRCUITRY
ELECTRICITY
INFORMATION STORAGE
PHYSICS
PULSE TECHNIQUE
STATIC STORES
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Beschreibung
Zusammenfassung:A data select circuit for selecting a column line in a CMOS ROM and for establishing a connection between a pair of bit lines and corresponding data lines uses a single NMOS pull-down transistor on the column line and a pair of P-channel pass transistors on the bit lines, the pass transistor gates being controlled not by an inverted column decode line, but by the column line itself, thus reducing the capacative load on the column decoder and saving space.