MANUFACTURING METHOD OF MOS TRANSISTOR

A sacrificial oxide layer (12), a first nitride layer (23) and a silicon oxide layer (24) are successively deposited upon a p type silicon substrate (1). These layers are etched using a photo- sensitive etch resistant layer as the mask, and a second nitride layer (26) is deposited to etch it into a...

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Bibliographische Detailangaben
Hauptverfasser: KANG, SANG - WON, HUH, SUNG - IG, PARK, GYU - HWA, KIM, MYEONG - GUN, LEE, GYU - HONG
Format: Patent
Sprache:eng
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Zusammenfassung:A sacrificial oxide layer (12), a first nitride layer (23) and a silicon oxide layer (24) are successively deposited upon a p type silicon substrate (1). These layers are etched using a photo- sensitive etch resistant layer as the mask, and a second nitride layer (26) is deposited to etch it into a required pattern. Then an ion implantation is carried out into the substrate (1), and an isolating oxide layer (2) is formed. Then the sacrificial oxide layer (22) and the second nitride layer (26) are removed, and source/drain regions (5,6) are formed. Then a gate oxide layer is formed, and a gate electrode (4) is formed by depositing a polycrystalline silicon and by ion-implanting arsenic.