SEMICONDUCTOR MEMORY

The memory cell is constructed of a capacitor for storing charges, and a switching MOS transistor. The drain of the switching transistor is connected to a bit line, and the gate is connected to a word line. In operation, the signal charges stored in the capacitor are read out by means of the switching transistor. In constructing an actual memory of bits, a memory array is configured. A so-called "open-bit line" configuration is provided in which bit lines are arrayed on both the sides of a sense amplifier for differentially deriving a signal. Only one bit line electrically intersects a single word line, and the difference between the signals of the bit lines is detected by the sense amplifier.