SYNCHRONIZING SIGNAL DEVIDING CIRCUIT

The IC for separating a synchronous signal, a burst gate pulse, and a clamping pulse from the synthesized video signal includes a first inverter (1) for inverting the phase of the synthesized video signal, a horizontal synchronous filter (2) for removing high frequency signals from the video signal, a first clamping circuit (3) for clamping the output signal of the filter (2) for easy separating of horizontal synchronous signal, a separator (40 for separating the horizontal signal from the clamped signal, a compensating circuit (5) for compensating the delay time caused by the clamping process, and circuit (6) for transmitting horinzontal synchronous signal with proper level.