METHODS AND SYSTEMS FOR FORMING DIPOLE LAYERS IN STACKED GATE-ALL-AROUND TRANSISTORS

METHODS AND SYSTEMS FOR FORMING DIPOLE LAYERS IN STACKED GATE-ALL-AROUND TRANSISTORS

Methods and related systems for forming structures are disclosed. Implementations of the presently described method include the steps of using a sacrificial gap fill fluid to selectively form a first layer on the one or more first surfaces at the bottom of the gap, and forming a second layer on the...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: LUKOSE LEO, RAMACHANDRAN RANJITH KARUPARAMBIL, HOMKAR SUVIDYAKUMAR VINOD, SIPPOLA PERTTU, BOTTIGLIERI LORENZO, ILLIBERI ANDREA, GIVENS MICHAEL, LEONHARDT ALESSANDRA, DEZELAH CHARLES, IVANOVA TATIANA, SURMAN MATTHEW, MOOTHERI VIVEK KOLADI
Format: Patent
Sprache:eng ; kor
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:Methods and related systems for forming structures are disclosed. Implementations of the presently described method include the steps of using a sacrificial gap fill fluid to selectively form a first layer on the one or more first surfaces at the bottom of the gap, and forming a second layer on the one or more second surfaces at the top of the gap. 구조체를 형성하기 위한 방법 및 관련 시스템이 개시된다. 현재 설명된 방법의 구현예는 갭의 하부에서 하나 이상의 제1 표면 상에 제1 층을 선택적으로 형성하기 위한 희생 갭 충진 유체를 사용하는 단계, 및 갭의 상부에서 하나 이상의 제2 표면 상에 제2 층을 형성하는 단계를 포함한다.