SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING THE SAME
One embodiment of the present invention relates to a passive element structure of a semiconductor package and a method for manufacturing the same. Disclosed is an invention for preventing an integrated passive device (IPD) located between a ball grid array for connecting a substrate and a printed ci...
Gespeichert in:
| Hauptverfasser: | , , , , |
|---|---|
| Format: | Patent |
| Sprache: | eng ; kor |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | |
|---|---|
| container_issue | |
| container_start_page | |
| container_title | |
| container_volume | |
| creator | LEE DONG KI LIM SEUNG GU PARK YEONG LYEOL KIM TAE DONG CHA JI HOON |
| description | One embodiment of the present invention relates to a passive element structure of a semiconductor package and a method for manufacturing the same. Disclosed is an invention for preventing an integrated passive device (IPD) located between a ball grid array for connecting a substrate and a printed circuit board from being damaged by the ball grid array or preventing a decrease in operating performance. The passive element structure includes a substrate; a main computing chip; and a passive element structure.
본 발명의 일 실시 예는 반도체패키지의 수동소자 구조 및 이의 제조 방법에 관한 것으로 기판과 인쇄회로기판 연결을 위한 볼 그리드 배열 사이에 위치하는 집적수동소자(IPD; Integrated Passive Device)가 볼 그리드 배열에 의해 파손되거나 작동 성능 감소를 방지하고자 하는 발명이 개시된다. |
| format | Patent |
| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_KR20230116291A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>KR20230116291A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_KR20230116291A3</originalsourceid><addsrcrecordid>eNrjZLAOdvX1dPb3cwl1DvEPUghwdPZ2dHdVcPRzUfB1DfHwd1FwAwr7OvqFujk6h4QGefq5K4R4uCoEO_q68jCwpiXmFKfyQmluBmU31xBnD93Ugvz41OKCxOTUvNSSeO8gIwMjYwNDQzMjS0NHY-JUAQBxsin1</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING THE SAME</title><source>esp@cenet</source><creator>LEE DONG KI ; LIM SEUNG GU ; PARK YEONG LYEOL ; KIM TAE DONG ; CHA JI HOON</creator><creatorcontrib>LEE DONG KI ; LIM SEUNG GU ; PARK YEONG LYEOL ; KIM TAE DONG ; CHA JI HOON</creatorcontrib><description>One embodiment of the present invention relates to a passive element structure of a semiconductor package and a method for manufacturing the same. Disclosed is an invention for preventing an integrated passive device (IPD) located between a ball grid array for connecting a substrate and a printed circuit board from being damaged by the ball grid array or preventing a decrease in operating performance. The passive element structure includes a substrate; a main computing chip; and a passive element structure.
본 발명의 일 실시 예는 반도체패키지의 수동소자 구조 및 이의 제조 방법에 관한 것으로 기판과 인쇄회로기판 연결을 위한 볼 그리드 배열 사이에 위치하는 집적수동소자(IPD; Integrated Passive Device)가 볼 그리드 배열에 의해 파손되거나 작동 성능 감소를 방지하고자 하는 발명이 개시된다.</description><language>eng ; kor</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2023</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20230804&DB=EPODOC&CC=KR&NR=20230116291A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20230804&DB=EPODOC&CC=KR&NR=20230116291A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>LEE DONG KI</creatorcontrib><creatorcontrib>LIM SEUNG GU</creatorcontrib><creatorcontrib>PARK YEONG LYEOL</creatorcontrib><creatorcontrib>KIM TAE DONG</creatorcontrib><creatorcontrib>CHA JI HOON</creatorcontrib><title>SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING THE SAME</title><description>One embodiment of the present invention relates to a passive element structure of a semiconductor package and a method for manufacturing the same. Disclosed is an invention for preventing an integrated passive device (IPD) located between a ball grid array for connecting a substrate and a printed circuit board from being damaged by the ball grid array or preventing a decrease in operating performance. The passive element structure includes a substrate; a main computing chip; and a passive element structure.
본 발명의 일 실시 예는 반도체패키지의 수동소자 구조 및 이의 제조 방법에 관한 것으로 기판과 인쇄회로기판 연결을 위한 볼 그리드 배열 사이에 위치하는 집적수동소자(IPD; Integrated Passive Device)가 볼 그리드 배열에 의해 파손되거나 작동 성능 감소를 방지하고자 하는 발명이 개시된다.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2023</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLAOdvX1dPb3cwl1DvEPUghwdPZ2dHdVcPRzUfB1DfHwd1FwAwr7OvqFujk6h4QGefq5K4R4uCoEO_q68jCwpiXmFKfyQmluBmU31xBnD93Ugvz41OKCxOTUvNSSeO8gIwMjYwNDQzMjS0NHY-JUAQBxsin1</recordid><startdate>20230804</startdate><enddate>20230804</enddate><creator>LEE DONG KI</creator><creator>LIM SEUNG GU</creator><creator>PARK YEONG LYEOL</creator><creator>KIM TAE DONG</creator><creator>CHA JI HOON</creator><scope>EVB</scope></search><sort><creationdate>20230804</creationdate><title>SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING THE SAME</title><author>LEE DONG KI ; LIM SEUNG GU ; PARK YEONG LYEOL ; KIM TAE DONG ; CHA JI HOON</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_KR20230116291A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; kor</language><creationdate>2023</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>LEE DONG KI</creatorcontrib><creatorcontrib>LIM SEUNG GU</creatorcontrib><creatorcontrib>PARK YEONG LYEOL</creatorcontrib><creatorcontrib>KIM TAE DONG</creatorcontrib><creatorcontrib>CHA JI HOON</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>LEE DONG KI</au><au>LIM SEUNG GU</au><au>PARK YEONG LYEOL</au><au>KIM TAE DONG</au><au>CHA JI HOON</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING THE SAME</title><date>2023-08-04</date><risdate>2023</risdate><abstract>One embodiment of the present invention relates to a passive element structure of a semiconductor package and a method for manufacturing the same. Disclosed is an invention for preventing an integrated passive device (IPD) located between a ball grid array for connecting a substrate and a printed circuit board from being damaged by the ball grid array or preventing a decrease in operating performance. The passive element structure includes a substrate; a main computing chip; and a passive element structure.
본 발명의 일 실시 예는 반도체패키지의 수동소자 구조 및 이의 제조 방법에 관한 것으로 기판과 인쇄회로기판 연결을 위한 볼 그리드 배열 사이에 위치하는 집적수동소자(IPD; Integrated Passive Device)가 볼 그리드 배열에 의해 파손되거나 작동 성능 감소를 방지하고자 하는 발명이 개시된다.</abstract><oa>free_for_read</oa></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | |
| ispartof | |
| issn | |
| language | eng ; kor |
| recordid | cdi_epo_espacenet_KR20230116291A |
| source | esp@cenet |
| subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
| title | SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING THE SAME |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-05T22%3A44%3A19IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=LEE%20DONG%20KI&rft.date=2023-08-04&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EKR20230116291A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |