SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING THE SAME
One embodiment of the present invention relates to a passive element structure of a semiconductor package and a method for manufacturing the same. Disclosed is an invention for preventing an integrated passive device (IPD) located between a ball grid array for connecting a substrate and a printed ci...
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Format: | Patent |
Sprache: | eng ; kor |
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Zusammenfassung: | One embodiment of the present invention relates to a passive element structure of a semiconductor package and a method for manufacturing the same. Disclosed is an invention for preventing an integrated passive device (IPD) located between a ball grid array for connecting a substrate and a printed circuit board from being damaged by the ball grid array or preventing a decrease in operating performance. The passive element structure includes a substrate; a main computing chip; and a passive element structure.
본 발명의 일 실시 예는 반도체패키지의 수동소자 구조 및 이의 제조 방법에 관한 것으로 기판과 인쇄회로기판 연결을 위한 볼 그리드 배열 사이에 위치하는 집적수동소자(IPD; Integrated Passive Device)가 볼 그리드 배열에 의해 파손되거나 작동 성능 감소를 방지하고자 하는 발명이 개시된다. |
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