SEMICONDUCTOR PACKAGE

A semiconductor package according to the technical idea of the present invention includes a plurality of semiconductor chips, each of which includes a semiconductor substrate and a redistribution layer disposed on an active surface of the semiconductor substrate; a redistribution structure in which...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: PARK JONG HO, FUJISAKI ATSUSHI, BAE SEONG HOON, KANG GYU HO, CHOI JU IL
Format: Patent
Sprache:eng ; kor
Schlagworte:
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Beschreibung
Zusammenfassung:A semiconductor package according to the technical idea of the present invention includes a plurality of semiconductor chips, each of which includes a semiconductor substrate and a redistribution layer disposed on an active surface of the semiconductor substrate; a redistribution structure in which the plurality of semiconductor chips are arranged side by side; a plurality of heat dissipation plates disposed between the plurality of semiconductor chips; and a molding member surrounding the plurality of semiconductor chips and the plurality of heat dissipation plates. The upper surface of the redistribution structure and the active surface of the semiconductor substrate are perpendicular to each other. A portion of each of the plurality of heat dissipation plates is exposed to an upper surface of the molding member. Therefore, it is possible to increase the number of semiconductor chips mounted in a semiconductor package. 본 발명의 기술적 사상에 따른 반도체 패키지는, 반도체 기판과 반도체 기판의 활성면에 배치되는 재배선층을 각각 포함하는 복수의 반도체 칩, 복수의 반도체 칩이 나란히 배열되는 재배선 구조물, 복수의 반도체 칩의 사이에 배치되는 복수의 방열판, 및 복수의 반도체 칩과 복수의 방열판을 둘러싸는 몰딩 부재를 포함하고, 재배선 구조물의 상면과 반도체 기판의 활성면은 서로 수직하고, 복수의 방열판 각각의 일부는 몰딩 부재의 상면으로 노출된다.