AIR SPACER FOR A GATE STRUCTURE OF A TRANSISTOR
A semiconductor structure includes a first device and a second device. The first device includes a first gate structure formed on an active region and a first air spacer disposed adjacent to the first gate structure. The second device includes a second gate structure formed on an isolation structure...
Gespeichert in:
| Hauptverfasser: | , , , , , |
|---|---|
| Format: | Patent |
| Sprache: | eng ; kor |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | |
|---|---|
| container_issue | |
| container_start_page | |
| container_title | |
| container_volume | |
| creator | CHEN YEN MING LIU YI HSIU CHEN YEN TING LEE TSUNG LIN LEE WEI YANG YANG FENG CHENG |
| description | A semiconductor structure includes a first device and a second device. The first device includes a first gate structure formed on an active region and a first air spacer disposed adjacent to the first gate structure. The second device includes a second gate structure formed on an isolation structure and a second air spacer disposed adjacent to the second gate structure. The first air spacer and the second air spacer have different sizes.
반도체 구조물은 제1 디바이스 및 제2 디바이스를 포함한다. 제1 디바이스는 활성 영역 위에 형성된 제1 게이트 구조물 및 제1 게이트 구조물에 인접하게 배치된 제1 에어 스페이서를 포함한다. 제2 디바이스는 격리 구조물 위에 형성된 제2 게이트 구조물 및 제2 게이트 구조물에 인접하게 배치된 제2 에어 스페이서를 포함한다. 제1 에어 스페이서와 제2 에어 스페이서는 상이한 사이즈를 갖는다. |
| format | Patent |
| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_KR20220152978A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>KR20220152978A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_KR20220152978A3</originalsourceid><addsrcrecordid>eNrjZNB39AxSCA5wdHYNUnDzD1JwVHB3DHFVCA4JCnUOCQ1yVfB3A4qFBDn6BXsGh_gH8TCwpiXmFKfyQmluBmU31xBnD93Ugvz41OKCxOTUvNSSeO8gIwMjIwNDUyNLcwtHY-JUAQB3sSah</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>AIR SPACER FOR A GATE STRUCTURE OF A TRANSISTOR</title><source>esp@cenet</source><creator>CHEN YEN MING ; LIU YI HSIU ; CHEN YEN TING ; LEE TSUNG LIN ; LEE WEI YANG ; YANG FENG CHENG</creator><creatorcontrib>CHEN YEN MING ; LIU YI HSIU ; CHEN YEN TING ; LEE TSUNG LIN ; LEE WEI YANG ; YANG FENG CHENG</creatorcontrib><description>A semiconductor structure includes a first device and a second device. The first device includes a first gate structure formed on an active region and a first air spacer disposed adjacent to the first gate structure. The second device includes a second gate structure formed on an isolation structure and a second air spacer disposed adjacent to the second gate structure. The first air spacer and the second air spacer have different sizes.
반도체 구조물은 제1 디바이스 및 제2 디바이스를 포함한다. 제1 디바이스는 활성 영역 위에 형성된 제1 게이트 구조물 및 제1 게이트 구조물에 인접하게 배치된 제1 에어 스페이서를 포함한다. 제2 디바이스는 격리 구조물 위에 형성된 제2 게이트 구조물 및 제2 게이트 구조물에 인접하게 배치된 제2 에어 스페이서를 포함한다. 제1 에어 스페이서와 제2 에어 스페이서는 상이한 사이즈를 갖는다.</description><language>eng ; kor</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2022</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20221117&DB=EPODOC&CC=KR&NR=20220152978A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20221117&DB=EPODOC&CC=KR&NR=20220152978A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>CHEN YEN MING</creatorcontrib><creatorcontrib>LIU YI HSIU</creatorcontrib><creatorcontrib>CHEN YEN TING</creatorcontrib><creatorcontrib>LEE TSUNG LIN</creatorcontrib><creatorcontrib>LEE WEI YANG</creatorcontrib><creatorcontrib>YANG FENG CHENG</creatorcontrib><title>AIR SPACER FOR A GATE STRUCTURE OF A TRANSISTOR</title><description>A semiconductor structure includes a first device and a second device. The first device includes a first gate structure formed on an active region and a first air spacer disposed adjacent to the first gate structure. The second device includes a second gate structure formed on an isolation structure and a second air spacer disposed adjacent to the second gate structure. The first air spacer and the second air spacer have different sizes.
반도체 구조물은 제1 디바이스 및 제2 디바이스를 포함한다. 제1 디바이스는 활성 영역 위에 형성된 제1 게이트 구조물 및 제1 게이트 구조물에 인접하게 배치된 제1 에어 스페이서를 포함한다. 제2 디바이스는 격리 구조물 위에 형성된 제2 게이트 구조물 및 제2 게이트 구조물에 인접하게 배치된 제2 에어 스페이서를 포함한다. 제1 에어 스페이서와 제2 에어 스페이서는 상이한 사이즈를 갖는다.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2022</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZNB39AxSCA5wdHYNUnDzD1JwVHB3DHFVCA4JCnUOCQ1yVfB3A4qFBDn6BXsGh_gH8TCwpiXmFKfyQmluBmU31xBnD93Ugvz41OKCxOTUvNSSeO8gIwMjIwNDUyNLcwtHY-JUAQB3sSah</recordid><startdate>20221117</startdate><enddate>20221117</enddate><creator>CHEN YEN MING</creator><creator>LIU YI HSIU</creator><creator>CHEN YEN TING</creator><creator>LEE TSUNG LIN</creator><creator>LEE WEI YANG</creator><creator>YANG FENG CHENG</creator><scope>EVB</scope></search><sort><creationdate>20221117</creationdate><title>AIR SPACER FOR A GATE STRUCTURE OF A TRANSISTOR</title><author>CHEN YEN MING ; LIU YI HSIU ; CHEN YEN TING ; LEE TSUNG LIN ; LEE WEI YANG ; YANG FENG CHENG</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_KR20220152978A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; kor</language><creationdate>2022</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>CHEN YEN MING</creatorcontrib><creatorcontrib>LIU YI HSIU</creatorcontrib><creatorcontrib>CHEN YEN TING</creatorcontrib><creatorcontrib>LEE TSUNG LIN</creatorcontrib><creatorcontrib>LEE WEI YANG</creatorcontrib><creatorcontrib>YANG FENG CHENG</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>CHEN YEN MING</au><au>LIU YI HSIU</au><au>CHEN YEN TING</au><au>LEE TSUNG LIN</au><au>LEE WEI YANG</au><au>YANG FENG CHENG</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>AIR SPACER FOR A GATE STRUCTURE OF A TRANSISTOR</title><date>2022-11-17</date><risdate>2022</risdate><abstract>A semiconductor structure includes a first device and a second device. The first device includes a first gate structure formed on an active region and a first air spacer disposed adjacent to the first gate structure. The second device includes a second gate structure formed on an isolation structure and a second air spacer disposed adjacent to the second gate structure. The first air spacer and the second air spacer have different sizes.
반도체 구조물은 제1 디바이스 및 제2 디바이스를 포함한다. 제1 디바이스는 활성 영역 위에 형성된 제1 게이트 구조물 및 제1 게이트 구조물에 인접하게 배치된 제1 에어 스페이서를 포함한다. 제2 디바이스는 격리 구조물 위에 형성된 제2 게이트 구조물 및 제2 게이트 구조물에 인접하게 배치된 제2 에어 스페이서를 포함한다. 제1 에어 스페이서와 제2 에어 스페이서는 상이한 사이즈를 갖는다.</abstract><oa>free_for_read</oa></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | |
| ispartof | |
| issn | |
| language | eng ; kor |
| recordid | cdi_epo_espacenet_KR20220152978A |
| source | esp@cenet |
| subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
| title | AIR SPACER FOR A GATE STRUCTURE OF A TRANSISTOR |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-07T04%3A35%3A17IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=CHEN%20YEN%20MING&rft.date=2022-11-17&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EKR20220152978A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |