SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME

Embodiments of the present invention provide a semiconductor device having a lower plug and a protective spacer capable of reducing process defects and improving the device characteristics, and a method for fabricating the same. The semiconductor device of the present technology comprises: conductive line patterns on a substrate; a lower plug comprising a pillar part positioned between the conductive line patterns and an extension part extending from the pillar part and overlapping one of the conductive line patterns; a capping layer covering a sidewall of the lower plug; and a protective spacer positioned between the lower plug and the capping layer. 본 기술은 기판 상의 도전성라인패턴들, 도전성라인패턴들 사이에 위치하는 필라부 및 필라부로부터 연장되어 도전성라인패턴들 중 어느 하나와 오버랩되는 연장부를 포함하는 하부플러그, 하부플러그의 측벽을 커버링하는 캡핑층 및 하부플러그와 캡핑층의 사이에 위치하는 보호스페이서를 포함하는 것을 특징으로 한다.