Semiconductor Package and semiconductor apparatus

According to an embodiment of the present invention, provided is a semiconductor package which comprises: a semiconductor chip; and a polydimethylsiloxane (PDMS) layer that is on the semiconductor chip and has an upper surface exposed to the outside. Since the semiconductor package can comprise the...

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Bibliographische Detailangaben
Hauptverfasser:	LEE BONG JAE, KANG HEE YOUB, LEE EUNG CHANG, OH YOUNG ROK, YANG HAE JUNG, LEE KI TAEK
Format:	Patent
Sprache:	eng ; kor
Schlagworte:	BASIC ELECTRIC ELEMENTS CHEMISTRY COMPOSITIONS BASED THEREON COMPOSITIONS OF MACROMOLECULAR COMPOUNDS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY METALLURGY ORGANIC MACROMOLECULAR COMPOUNDS SEMICONDUCTOR DEVICES THEIR PREPARATION OR CHEMICAL WORKING-UP
Online-Zugang:	Volltext bestellen
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Beschreibung
Zusammenfassung:	According to an embodiment of the present invention, provided is a semiconductor package which comprises: a semiconductor chip; and a polydimethylsiloxane (PDMS) layer that is on the semiconductor chip and has an upper surface exposed to the outside. Since the semiconductor package can comprise the PDMS layer, heat dissipation performance in a vacuum state of the semiconductor package can be improved. 본 개시의 일 실시예에 따른 반도체 패키지는 반도체 칩 및 상기 반도체 칩 상에 있고, 상면이 외부에 노출된 폴리디메틸실록산 층을 포함할 수 있다. 반도체 패키지는 폴리디메틸실록산 층을 포함할 수 있어서, 반도체 패키지의 진공 상태에서 방열 성능이 개선될 수 있다.