SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE PACKAGE HAVING THEREOF
An embodiment of the present invention relates to a semiconductor device and a semiconductor device package including the same. The semiconductor device disclosed in the embodiment of the present invention includes: a first conductive semiconductor layer including a plurality of first recesses; an a...
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Format: | Patent |
Sprache: | eng ; kor |
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Zusammenfassung: | An embodiment of the present invention relates to a semiconductor device and a semiconductor device package including the same. The semiconductor device disclosed in the embodiment of the present invention includes: a first conductive semiconductor layer including a plurality of first recesses; an active layer arranged on the first conductive semiconductor layer; a second conductive semiconductor layer arranged on the active layer; and a cap layer arranged on the active layer and the second conductive semiconductor layer. The cap layer includes a first region arrange don the lateral side of the first recess. The first region includes a lower region whose thickness is thick in a direction from the upper side of the lateral side of the first recess to the lower side of the lateral side of the first recess. Accordingly, the present invention can prevent a current leakage.
실시 예는 반도체 소자 및 이를 갖는 반도체소자 패키지에 관한 것이다. 실시 예에 개시된 반도체 소자는, 복수의 제1리세스를 갖는 제1도전형 반도체층; 상기 제1도전형 반도체층 상에 배치된 활성층; 상기 활성층 상에 배치된 제2도전형 반도체층; 및 상기 활성층과 상기 제2도전형 반도체층 상에 배치된 캡층을 포함하며, 상기 캡층은 상기 제1리세스의 측면 상에 배치된 제1영역을 포함하며, 상기 제1영역은 상기 제1리세스의 측면 상부에서 상기 제1리세스의 측면 하부 방향으로 두께가 두꺼운 하부 영역을 포함한다. |
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