CIRCUIT FOR CALIBRATING INPUT/OUTPUT TERMINAL CHARACTERISTIC AND SEMICONDUCTOR APPARATUS INCLUDING THE SAME
The present technique includes a plurality of input/output terminals, wherein some of the input/output terminals are selectively receive a characteristic adjustment signal according to an external input to perform characteristic adjustment; and a characteristic adjustment signal generation circuit w...
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description | The present technique includes a plurality of input/output terminals, wherein some of the input/output terminals are selectively receive a characteristic adjustment signal according to an external input to perform characteristic adjustment; and a characteristic adjustment signal generation circuit which is connected in common with the plurality of input/output terminals via a test signal line and commonly supplies the characteristic adjustment signal to the plurality of input/output terminals via the test signal line. It is possible to optimize the characteristics of the input/output terminals.
본 기술은 외부 입력에 따라 일부가 선택적으로 특성 조정 신호를 입력 받아 특성 조정이 이루어지도록 구성된 복수의 입/출력단; 및 테스트 신호 라인을 통해 상기 복수의 입/출력단과 공통 연결되며, 상기 테스트 신호 라인을 통해 상기 특성 조정 신호를 상기 복수의 입/출력단에 공통적으로 제공하도록 구성된 특성 조정신호 생성회로를 포함할 수 있다. |
format | Patent |
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본 기술은 외부 입력에 따라 일부가 선택적으로 특성 조정 신호를 입력 받아 특성 조정이 이루어지도록 구성된 복수의 입/출력단; 및 테스트 신호 라인을 통해 상기 복수의 입/출력단과 공통 연결되며, 상기 테스트 신호 라인을 통해 상기 특성 조정 신호를 상기 복수의 입/출력단에 공통적으로 제공하도록 구성된 특성 조정신호 생성회로를 포함할 수 있다.</description><language>eng ; kor</language><subject>INFORMATION STORAGE ; PHYSICS ; STATIC STORES</subject><creationdate>2018</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20180425&DB=EPODOC&CC=KR&NR=20180041822A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25563,76418</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20180425&DB=EPODOC&CC=KR&NR=20180041822A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>PARK, NAK KYU</creatorcontrib><title>CIRCUIT FOR CALIBRATING INPUT/OUTPUT TERMINAL CHARACTERISTIC AND SEMICONDUCTOR APPARATUS INCLUDING THE SAME</title><description>The present technique includes a plurality of input/output terminals, wherein some of the input/output terminals are selectively receive a characteristic adjustment signal according to an external input to perform characteristic adjustment; and a characteristic adjustment signal generation circuit which is connected in common with the plurality of input/output terminals via a test signal line and commonly supplies the characteristic adjustment signal to the plurality of input/output terminals via the test signal line. It is possible to optimize the characteristics of the input/output terminals.
본 기술은 외부 입력에 따라 일부가 선택적으로 특성 조정 신호를 입력 받아 특성 조정이 이루어지도록 구성된 복수의 입/출력단; 및 테스트 신호 라인을 통해 상기 복수의 입/출력단과 공통 연결되며, 상기 테스트 신호 라인을 통해 상기 특성 조정 신호를 상기 복수의 입/출력단에 공통적으로 제공하도록 구성된 특성 조정신호 생성회로를 포함할 수 있다.</description><subject>INFORMATION STORAGE</subject><subject>PHYSICS</subject><subject>STATIC STORES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2018</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNjLEKwjAQQLs4iPoPB85iWh26ntfUHqZpSS5zKRIXRQv1_zGCH-D0ePB4y-xO7CiwQN05IDR8cihsz8C2D7LvgiSAaNeyRQPUoENKyl6YAG0FXrdMna0CSVpg36dCgk8DMqH6rqTR4LHV62xxGx9z3Py4yra1Fmp2cXoNcZ7Ga3zG93BxhcpLpY55WRR4-K_6AOWdN7w</recordid><startdate>20180425</startdate><enddate>20180425</enddate><creator>PARK, NAK KYU</creator><scope>EVB</scope></search><sort><creationdate>20180425</creationdate><title>CIRCUIT FOR CALIBRATING INPUT/OUTPUT TERMINAL CHARACTERISTIC AND SEMICONDUCTOR APPARATUS INCLUDING THE SAME</title><author>PARK, NAK KYU</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_KR20180041822A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; kor</language><creationdate>2018</creationdate><topic>INFORMATION STORAGE</topic><topic>PHYSICS</topic><topic>STATIC STORES</topic><toplevel>online_resources</toplevel><creatorcontrib>PARK, NAK KYU</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>PARK, NAK KYU</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>CIRCUIT FOR CALIBRATING INPUT/OUTPUT TERMINAL CHARACTERISTIC AND SEMICONDUCTOR APPARATUS INCLUDING THE SAME</title><date>2018-04-25</date><risdate>2018</risdate><abstract>The present technique includes a plurality of input/output terminals, wherein some of the input/output terminals are selectively receive a characteristic adjustment signal according to an external input to perform characteristic adjustment; and a characteristic adjustment signal generation circuit which is connected in common with the plurality of input/output terminals via a test signal line and commonly supplies the characteristic adjustment signal to the plurality of input/output terminals via the test signal line. It is possible to optimize the characteristics of the input/output terminals.
본 기술은 외부 입력에 따라 일부가 선택적으로 특성 조정 신호를 입력 받아 특성 조정이 이루어지도록 구성된 복수의 입/출력단; 및 테스트 신호 라인을 통해 상기 복수의 입/출력단과 공통 연결되며, 상기 테스트 신호 라인을 통해 상기 특성 조정 신호를 상기 복수의 입/출력단에 공통적으로 제공하도록 구성된 특성 조정신호 생성회로를 포함할 수 있다.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | INFORMATION STORAGE PHYSICS STATIC STORES |
title | CIRCUIT FOR CALIBRATING INPUT/OUTPUT TERMINAL CHARACTERISTIC AND SEMICONDUCTOR APPARATUS INCLUDING THE SAME |
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