SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
A semiconductor memory device according to an embodiment of the present invention includes: a substrate; a laminated structure including insulating patterns and gate electrodes alternately and repetitively stacked on the substrate; a vertical channel structure passing through the laminated structure...
Gespeichert in:
| Hauptverfasser: | , , , , , , |
|---|---|
| Format: | Patent |
| Sprache: | eng ; kor |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| Zusammenfassung: | A semiconductor memory device according to an embodiment of the present invention includes: a substrate; a laminated structure including insulating patterns and gate electrodes alternately and repetitively stacked on the substrate; a vertical channel structure passing through the laminated structure and including an information storage pattern; and a voltage fixing layer located within the vertical channel structure. The present invention reduces an interference phenomenon between adjacent memory cells and improves the operation reliability.
본 발명의 실시예에 의한 반도체 메모리 장치는, 기판; 상기 기판 상에 교대로 반복 적층된 절연 패턴들 및 게이트 전극들을 포함하는 적층 구조체; 상기 적층 구조체를 관통하며, 정보 저장 패턴을 포함하는 수직 채널 구조체; 및 상기 수직 채널 구조체 내에 위치하는 전압 고정층을 포함할 수 있다. |
|---|