ELECTRONIC COMPONENT PACKAGE AND MANUFACTURING METHOD FOR THE SAME

The present disclosure relates to an electronic component package and a manufacturing method thereof. The electronic component package includes a frame which has a through hole, an electronic component which is arranged in the through hole, and a rewiring layer which is arranged on one side of the e...

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Bibliographische Detailangaben
Hauptverfasser:	KIM, JONG RIP, LEE, DOO HWAN, KIM, HYOUNG JOON, OH, KYUNG SEOB
Format:	Patent
Sprache:	eng ; kor
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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Beschreibung
Zusammenfassung:	The present disclosure relates to an electronic component package and a manufacturing method thereof. The electronic component package includes a frame which has a through hole, an electronic component which is arranged in the through hole, and a rewiring layer which is arranged on one side of the electronic component and the frame. The rewiring layer includes a wiring pattern electrically connected to the electronic component. A wiring pattern which is buried to expose one side thereof and is electrically connected to the wiring pattern of the rewiring layer is arranged on one side of the frame. Accordingly, the present invention can solve a bending problem of the electronic component package and provide a wider routing area. 본 개시는 관통 홀을 가지는 프레임, 상기 관통 홀 내에 배치된 전자부품, 및 상기 프레임 및 상기 전자부품의 일측에 배치된 재배선층을 포함하며, 상기 재배선층은 상기 전자부품과 전기적으로 연결되는 배선패턴을 포함하며, 상기 프레임의 일측에는, 일면이 노출되도록 매립되며 상기 재배선층의 배선패턴과 전기적으로 연결되는 배선패턴이 배치된, 전자부품 패키지 및 그 제조방법에 관한 것이다.