Method for Manufacturing Circuit having Lamination Layer using LDS Process

The present invention relates to a method for manufacturing a circuit having a lamination layer using an LED process. The present invention can form a circuit of a multi-layered structure from a single layer on a flat or curved shaped injection, metal product, glass, ceramic, rubber, or other materi...

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Bibliographische Detailangaben
Hauptverfasser:	KIM, YOUNG SANG, KIM, TAE WOOK, KIM, SUNG JUN, CHOI, SEUNG HYUK, RYU, CHEONG HO, HONG, HYUN JUN
Format:	Patent
Sprache:	eng ; kor
Schlagworte:	CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ELECTRICITY MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS PRINTED CIRCUITS
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Beschreibung
Zusammenfassung:	The present invention relates to a method for manufacturing a circuit having a lamination layer using an LED process. The present invention can form a circuit of a multi-layered structure from a single layer on a flat or curved shaped injection, metal product, glass, ceramic, rubber, or other material so as to be easily applied to a curved structure of various electronic circuit application products. 본 발명은 다양한 전자회로 응용제품의 곡면 구조에 손쉽게 적용되도록 하기 위하여, 평면이나 곡면 형상인 사출물, 금속제품, 유리, 세라믹, 고무 기타 물질 위에 단층부터 다층 구조의 회로를 형성할 수 있는, LDS 공법을 이용한 적층 회로 제작 방법에 관한 것이다.