SYSTEM AND METHOD FOR ANALYZING INTEGRATED CIRCUIT WITH CONSIDERATION OF PROCESS VARIATIONS
According to an embodiment of the present invention, a method for analyzing an integrated circuit, which is implemented by a computing system or a processor, comprises the following steps of: providing a plurality of resistances and a plurality of capacitance which correspond to a first net based on...
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| Format: | Patent |
| Sprache: | eng ; kor |
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| Zusammenfassung: | According to an embodiment of the present invention, a method for analyzing an integrated circuit, which is implemented by a computing system or a processor, comprises the following steps of: providing a plurality of resistances and a plurality of capacitance which correspond to a first net based on process variations; counting the number of conductive segments which correspond to the first net; and calculating a corner resistance and a corner capacitance of the first net based on the number of conductive segments, the plurality of resistances and the plurality of capacitances.
본 개시의 일실시예에 따라 컴퓨팅 시스템 또는 프로세서에 의하여 구현되는 집적 회로를 분석하는 방법은, 공정 변이에 기초하여 제1 네트에 대응하는 복수의 저항치들 및 정전 용량들을 제공하는 단계, 제1 네트에 대응하는 전도성 세그먼트들의 개수를 카운트하는 단계, 및 전도성 세그먼트들의 개수, 복수의 저항치들 및 정전용량들에 기초하여 제1 네트의 코너 저항치 및 코너 정전용량을 계산하는 단계를 포함할 수 있다. |
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