METHOD FOR FABRICATING METAL SILICIDE LAYER AND METHOD FOR FABRICATING SEMICONDUCTOR DEVICE USING THE SAME

The technical idea of the present invention provides a method for fabricating a metal silicide layer to minimize contact resistance, and a method for fabricating a semiconductor device using the same. The method for fabricating a metal silicide layer includes a step of forming a doping layer having...

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Bibliographische Detailangaben
1. Verfasser:	CHO, CHOONG RAE
Format:	Patent
Sprache:	eng ; kor
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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Beschreibung
Zusammenfassung:	The technical idea of the present invention provides a method for fabricating a metal silicide layer to minimize contact resistance, and a method for fabricating a semiconductor device using the same. The method for fabricating a metal silicide layer includes a step of forming a doping layer having dopant in a surface part of a semiconductor substrate; a step of forming a metal-silicon composite layer by depositing metal and silicon on the doping layer; and a step of forming a metal silicide layer by performing silicidation on the metal-silicon composite layer. 본 발명의 기술적 사상은 콘택 저항을 최소화할 수 있는 메탈 실리사이드층 형성 방법 및 그 방법을 이용한 반도체 소자의 제조방법을 제공한다. 그 메탈 실리사이드층 형성방법은 반도체 기판의 표면 부분에 도펀트(dopant)를 구비한 도핑층을 형성하는 단계; 상기 도핑층 상에 메탈 및 실리콘을 증착하여 메탈-실리콘 복합층을 형성하는 단계; 및 상기 메탈-실리콘 복합층을 실리사이드화(silicidation) 하여 메탈 실리사이드층을 형성하는 단계;를 포함한다.