PRINTED CIRCUIT BOARD AND METHOD OF FABRICATING THE SAME
According to the present invention, provided is a printed circuit board, comprising: an insulating member; a first plating layer embedded in a lower area of the insulation member; a second plating layer embedded in an upper area of the insulation layer; and a plating via coupling the first plating l...
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| creator | LEE, SEUNG EUN KWON, KWANG HEE CHUNG, YUL KYO SUNG, KI JUNG IM, SE RANG HWANG, JUN OH LEE, YOUNG KWAN |
| description | According to the present invention, provided is a printed circuit board, comprising: an insulating member; a first plating layer embedded in a lower area of the insulation member; a second plating layer embedded in an upper area of the insulation layer; and a plating via coupling the first plating layer and the second plating layer arranged in a diagonal direction. Accordingly, high reliability may be secured on a flexible substrate, which requires flexibility.
본 발명은, 절연 부재와, 상기 절연 부재의 하부 영역에 매립된 제1 도금층, 상기 절연 부재의 상부 영역에 매립된 제2 도금층 및 상기 절연 부재에 매립되며, 사선 방향으로 배치된 상기 제1 도금층과 상기 제2 도금층을 연결하는 도금비아를 포함하는 인쇄회로기판을 제시한다. |
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| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_KR20160041588A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>KR20160041588A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_KR20160041588A3</originalsourceid><addsrcrecordid>eNrjZLAICPL0C3F1UXD2DHIO9QxRcPJ3DHJRcPRzUfB1DfHwd1Hwd1Nwc3QK8nR2DPH0c1cI8XBVCHb0deVhYE1LzClO5YXS3AzKbq4hzh66qQX58anFBYnJqXmpJfHeQUYGhmYGBiaGphYWjsbEqQIAzqwo3A</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>PRINTED CIRCUIT BOARD AND METHOD OF FABRICATING THE SAME</title><source>esp@cenet</source><creator>LEE, SEUNG EUN ; KWON, KWANG HEE ; CHUNG, YUL KYO ; SUNG, KI JUNG ; IM, SE RANG ; HWANG, JUN OH ; LEE, YOUNG KWAN</creator><creatorcontrib>LEE, SEUNG EUN ; KWON, KWANG HEE ; CHUNG, YUL KYO ; SUNG, KI JUNG ; IM, SE RANG ; HWANG, JUN OH ; LEE, YOUNG KWAN</creatorcontrib><description>According to the present invention, provided is a printed circuit board, comprising: an insulating member; a first plating layer embedded in a lower area of the insulation member; a second plating layer embedded in an upper area of the insulation layer; and a plating via coupling the first plating layer and the second plating layer arranged in a diagonal direction. Accordingly, high reliability may be secured on a flexible substrate, which requires flexibility.
본 발명은, 절연 부재와, 상기 절연 부재의 하부 영역에 매립된 제1 도금층, 상기 절연 부재의 상부 영역에 매립된 제2 도금층 및 상기 절연 부재에 매립되며, 사선 방향으로 배치된 상기 제1 도금층과 상기 제2 도금층을 연결하는 도금비아를 포함하는 인쇄회로기판을 제시한다.</description><language>eng ; kor</language><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ; ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS ; PRINTED CIRCUITS</subject><creationdate>2016</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20160418&DB=EPODOC&CC=KR&NR=20160041588A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20160418&DB=EPODOC&CC=KR&NR=20160041588A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>LEE, SEUNG EUN</creatorcontrib><creatorcontrib>KWON, KWANG HEE</creatorcontrib><creatorcontrib>CHUNG, YUL KYO</creatorcontrib><creatorcontrib>SUNG, KI JUNG</creatorcontrib><creatorcontrib>IM, SE RANG</creatorcontrib><creatorcontrib>HWANG, JUN OH</creatorcontrib><creatorcontrib>LEE, YOUNG KWAN</creatorcontrib><title>PRINTED CIRCUIT BOARD AND METHOD OF FABRICATING THE SAME</title><description>According to the present invention, provided is a printed circuit board, comprising: an insulating member; a first plating layer embedded in a lower area of the insulation member; a second plating layer embedded in an upper area of the insulation layer; and a plating via coupling the first plating layer and the second plating layer arranged in a diagonal direction. Accordingly, high reliability may be secured on a flexible substrate, which requires flexibility.
본 발명은, 절연 부재와, 상기 절연 부재의 하부 영역에 매립된 제1 도금층, 상기 절연 부재의 상부 영역에 매립된 제2 도금층 및 상기 절연 부재에 매립되며, 사선 방향으로 배치된 상기 제1 도금층과 상기 제2 도금층을 연결하는 도금비아를 포함하는 인쇄회로기판을 제시한다.</description><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</subject><subject>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</subject><subject>PRINTED CIRCUITS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2016</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLAICPL0C3F1UXD2DHIO9QxRcPJ3DHJRcPRzUfB1DfHwd1Hwd1Nwc3QK8nR2DPH0c1cI8XBVCHb0deVhYE1LzClO5YXS3AzKbq4hzh66qQX58anFBYnJqXmpJfHeQUYGhmYGBiaGphYWjsbEqQIAzqwo3A</recordid><startdate>20160418</startdate><enddate>20160418</enddate><creator>LEE, SEUNG EUN</creator><creator>KWON, KWANG HEE</creator><creator>CHUNG, YUL KYO</creator><creator>SUNG, KI JUNG</creator><creator>IM, SE RANG</creator><creator>HWANG, JUN OH</creator><creator>LEE, YOUNG KWAN</creator><scope>EVB</scope></search><sort><creationdate>20160418</creationdate><title>PRINTED CIRCUIT BOARD AND METHOD OF FABRICATING THE SAME</title><author>LEE, SEUNG EUN ; KWON, KWANG HEE ; CHUNG, YUL KYO ; SUNG, KI JUNG ; IM, SE RANG ; HWANG, JUN OH ; LEE, YOUNG KWAN</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_KR20160041588A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; kor</language><creationdate>2016</creationdate><topic>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</topic><topic>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</topic><topic>PRINTED CIRCUITS</topic><toplevel>online_resources</toplevel><creatorcontrib>LEE, SEUNG EUN</creatorcontrib><creatorcontrib>KWON, KWANG HEE</creatorcontrib><creatorcontrib>CHUNG, YUL KYO</creatorcontrib><creatorcontrib>SUNG, KI JUNG</creatorcontrib><creatorcontrib>IM, SE RANG</creatorcontrib><creatorcontrib>HWANG, JUN OH</creatorcontrib><creatorcontrib>LEE, YOUNG KWAN</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>LEE, SEUNG EUN</au><au>KWON, KWANG HEE</au><au>CHUNG, YUL KYO</au><au>SUNG, KI JUNG</au><au>IM, SE RANG</au><au>HWANG, JUN OH</au><au>LEE, YOUNG KWAN</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>PRINTED CIRCUIT BOARD AND METHOD OF FABRICATING THE SAME</title><date>2016-04-18</date><risdate>2016</risdate><abstract>According to the present invention, provided is a printed circuit board, comprising: an insulating member; a first plating layer embedded in a lower area of the insulation member; a second plating layer embedded in an upper area of the insulation layer; and a plating via coupling the first plating layer and the second plating layer arranged in a diagonal direction. Accordingly, high reliability may be secured on a flexible substrate, which requires flexibility.
본 발명은, 절연 부재와, 상기 절연 부재의 하부 영역에 매립된 제1 도금층, 상기 절연 부재의 상부 영역에 매립된 제2 도금층 및 상기 절연 부재에 매립되며, 사선 방향으로 배치된 상기 제1 도금층과 상기 제2 도금층을 연결하는 도금비아를 포함하는 인쇄회로기판을 제시한다.</abstract><oa>free_for_read</oa></addata></record> |
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| subjects | CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ELECTRICITY MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS PRINTED CIRCUITS |
| title | PRINTED CIRCUIT BOARD AND METHOD OF FABRICATING THE SAME |
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