SYNCHRONOUS DC-DC BUCK CONVERTER FOR REDUCING ELECTROMAGNETIC INTERFERENCE USING DIGITAL DELAY LOCKED LOOP AND METHOD FOR CONTROLLING SHAPING OF SWITCHING SIGNALS

A synchronous DC-DC buck converter according to the embodiments of the present invention generates a dropped output voltage by using a first switch which applies an input voltage to an inductor for the duty period of a first switching signal and a second switch which is switched with a second switching signal complementary to the first switching signal. The synchronous DC-DC buck converter includes: a sawtooth wave generating unit which generates a sawtooth wave with a frequency according to a frequency setting signal; a driving oscillation signal generating unit which generates an error voltage of a reference voltage and an output voltage, and generates a driving oscillation signal with a duty ratio corresponding to the amplitude of the error voltage by comparing the sawtooth wave with the error voltage; a switching signal generating unit which generates the first and second switching signals to have waveforms applying dead time to the duty period of the driving oscillation signal; and a phase tracking unit which generates a frequency setting signal based on a sum signal to add a frequency variation signal according to a diffusion spectrum clock setting voltage to an activation period length signal of a pulse corresponding to the phase difference between the driving oscillation signal and a reference clock signal.