LAYOUT DESIGN SYSTEM, LAYOUT DESIGN METHOD, AND SEMICONDUCTOR DEVICE FABRICATED BY USING THE SAME

LAYOUT DESIGN SYSTEM, LAYOUT DESIGN METHOD, AND SEMICONDUCTOR DEVICE FABRICATED BY USING THE SAME

Provided are a layout design system and a semiconductor device fabricated thereby. The layout design system includes a processor, a storage unit which stores a first unit design with a first cross section without arranging a termination on the edge thereof, and a design module which generates a seco...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: SONG, TAE JOONG, OH, SANG KYU, HA,YA, PAEK, SEUNG WEON, BAEK, SANG HOON
Format: Patent
Sprache:eng ; kor
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
ELECTRICITY
PHYSICS
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Beschreibung
Zusammenfassung:Provided are a layout design system and a semiconductor device fabricated thereby. The layout design system includes a processor, a storage unit which stores a first unit design with a first cross section without arranging a termination on the edge thereof, and a design module which generates a second unit design with a second cross section which is larger than the first cross section by arranging the termination on the edge of at least one first unit design by using the processor. 레이아웃 디자인 시스템 및 이를 이용하여 제조된 반도체 장치가 제공된다. 레이아웃 디자인 시스템은, 프로세서, 그 가장 자리에 터미네이션(termination)이 미배치되고, 제1 단면적을 갖는 제1 유닛 디자인이 저장된 저장부, 및 프로세서를 이용하여, 적어도 하나의 제1 유닛 디자인의 가장 자리에 터미네이션을 배치하여 제1 단면적 보다 큰 제2 단면적을 갖는 제2 유닛 디자인을 생성하는 디자인 모듈을 포함한다.